Described by the company as the world’s first agentic workflow for chip design and verification, ChipStack AI Super Agent targets activities such as coding RTL and testbenches, generating test plans, orchestrating regressions, debugging and auto‑fixing issues. Cadence said users can see productivity improvements of up to 10x across these tasks.
The system builds on Cadence’s existing AI‑enabled design and verification portfolio, including the Verisium Verification Platform, Cadence Cerebrus Intelligent Chip Explorer, and the JedAI data and AI platform. It is designed to integrate agentic AI with Cadence’s optimisation and assistant technologies within a single workflow.
According to Cadence, ChipStack AI Super Agent supports cloud and on‑premises frontier models and can run with frameworks including NVIDIA’s NeMo generative AI and the NVIDIA Llama Nemotron Reasoning Model to bolster designer productivity.
Paul Cunningham, senior vice president and general manager of Research and Development at Cadence, said the launch responds to resourcing pressures: “Our customers are facing a significant deficit in the engineering talent needed to deliver on their product roadmaps,” he said. “Our ChipStack AI Super Agent is a game changer for design and verification productivity, and deployments are ramping fast.”
Cadence said the technology is in early deployment at several major chip and systems companies, including Altera and NVIDIA.
Arvind Vidyarthi, senior director of engineering at Altera, said: “The Cadence ChipStack AI Super Agent has significantly reduced our verification effort in some areas by approximately 10x, enabling our team to achieve closure much more swiftly and confidently.” He added that combining an interactive, engineer‑in‑the‑loop experience with Cadence’s AI‑driven verification had delivered “step‑function productivity gains” and deeper functional coverage on complex designs.
Timothy Costa, GM of Industrial and Computational Engineering at NVIDIA, said AI is now essential for designing future devices. “As semiconductor complexity continues to accelerate, AI has become essential to designing the next generation of chips,” he said. “Our collaboration with Cadence, including innovations like the ChipStack AI Super Agent, demonstrates how combining intelligent reasoning capabilities such as Mental Models and automated formal test plan generation with NVIDIA accelerated computing can unlock new levels of productivity and efficiency for chip designers.”
Cadence has been incorporating AI into its electronic design automation (EDA) tools for several years and says its AI‑enabled semiconductor and system solutions have been used in more than 1,000 tapeouts.
The company positions ChipStack AI Super Agent as an extension of this strategy, presenting it as a cohesive, agent‑based layer that coordinates existing Cadence platforms and external AI models to automate routine and complex verification workflows.
The launch comes amid growing industry interest in agentic AI – systems that can plan, decompose and execute multi‑step tasks – applied to engineering workflows. For chipmakers facing schedule pressure and skills gaps, vendors are pitching agent‑driven tools as a way to shorten iteration cycles, increase coverage, and improve first‑pass silicon success without expanding headcount.
Cadence said insights from early deployments will inform broader roll‑out plans, with the company continuing to integrate ChipStack AI Super Agent across its design and verification stack and partner model ecosystem.